RISC-V走向開放服務器規范
轉載自:https://www.hpcwire.com/2023/07/24/risc-v-moving-toward-open-server-specification/
中文翻譯:
2023年7月24日
RISC-V International目前正在起草一份可以標準化RISC-V服務器芯片和系統開發的規范,RISC-V International是一個處理指令集架構開發的組織。
該規范為基于RISC-V技術的各層服務器計算系統建立了標準接口。它可以幫助公司在云計算環境中部署RISC-V服務器,其中軟件通過虛擬化CPU運行,而不是直接從硬件CPU運行。
可以肯定的是,服務器規格還處于早期階段。當前的迭代包括系統管理控制器、片上系統模塊、安全層、引導系統和虛擬化層。
RISC-V在一份定義該規范的文件中表示:“RISC-V服務器SoC(片上系統)規范定義了一套標準化的功能,便攜式系統軟件(如操作系統和虛擬機管理程序)可以依賴這些功能存在于RISC-V服務器SoC中。”此處提供規范鏈接。
RISC-V服務器規格模型。
RISC-V是一個可免費許可的指令集架構。任何人都可以根據架構創建芯片,但公司也可以添加其專有模塊并出售這些芯片。RISC-V得到了大多數頂級芯片制造商的支持,包括英特爾、AMD、蘋果、英偉達和高通。
開放計算項目還定義了x86和ARM服務器的類似規格,這些規格被服務器制造商用作構建標準化數據中心產品的藍圖。
RISC-V提案還為服務器系統提供了基礎,以支持CXL等技術,CXL已經得到了x86和ARM服務器制造商的支持。
即將推出的CXL 3.0規范在芯片、內存和存儲之間提供了高速通信鏈路,并引起了服務器硬件制造商的興趣,因為它可能會改變數據中心的構建方式。該規范將通過分解計算和存儲模塊來減少處理和帶寬阻塞點。
服務器規范建立在指令集架構技術之上,例如近年來批準的較新的矢量處理規范。
許多RISC-V公司正在構建服務器芯片,其中最著名的是Ventana和Esperanto。
這些公司在基本指令集架構之上構建了自己的專有模塊,但表示他們將標準化為RISC-V International批準的最新規格。
歐洲和美國的研究機構正在試驗RISC-V微服務器來開發和測試軟件。
創建服務器規范的提案也反映了RISC-V的開源精神——作為一個社區共同開發和改進產品。
RISC-V International的首席技術官Mark Himelstein在上個月在巴塞羅那舉行的RISC-V峰會上發表演講時說:“我們之所以是一個社區......是因為我們可以分擔負擔。”
目標是防止RISC-V社區中的硬件和軟件碎片化。RISC-V International希望避免Android的命運,隨著手機開發人員修改操作系統以滿足他們的智能手機需求,Android的命運迅速支離破碎。
“我們分擔定義ISA的工作,我們分擔尋找硬件-軟件接口的工作......我們分擔軟件負擔。從引導代碼到應用程序,它意味著一切,”Himelstein說。
RISC-V仍然不被認為是主導數據中心市場的x86或ARM的可行服務器替代品。
“當人們說'哦,RISC 5落后ARM10年'時,答案是肯定的,但不需要10年就能趕上。世界語系統首席執行官Dave Ditzel在RISC-V峰會的另一場演講中說:“需要幾年時間才能趕上。”
英語原文:
July 24, 2023
A specification that could standardize the development of RISC-V server chips and systems is currently being drafted by RISC-V International, an organization that is handling the development of the instruction set architecture.
The specification establishes standard interfaces for various layers of server computing systems built on RISC-V technology. It could help companies deploy RISC-V servers in cloud computing environments, in which software runs off virtualized CPUs and not directly off hardware CPUs.
To be sure, the server spec is in its early stages. The current iteration includes system management controllers, system-on-chip modules, security layers, boot systems, and virtualization layers.
“The RISC-V server SoC (system on chip) specification defines a standardized set of capabilities that portable system software such as operating systems and hypervisors can rely on being present in a RISC-V server SoC,” RISC-V said in a document defining the specification. A link to the specification is availablehere.
The RISC-V server specification model.
RISC-V is an instruction-set architecture that is free to license. Anyone can create chips based on the architecture, but companies can also add their proprietary modules and sell those chips. RISC-V is backed by most of the top chipmakers, including Intel, AMD, Apple, Nvidia, and Qualcomm.
The Open Compute Project has also defined similar specs for x86 and ARM servers, which are used as blueprints by server makers to build standardized data-center products.
The RISC-V proposal also provides a base for server systems to support technologies like CXL, which is already backed by x86 and ARM server makers.
The upcoming CXL 3.0 spec provides a high-speed communication link between chips, memory, and storage, and is drawing interest from server hardware makers as it could change the way data centers are built. The spec will cut processing and bandwidth chokepoints by disaggregating compute and storage modules.
The server spec is built on top of technologies in the instruction set architecture such as the newer vector processing specification, which has been ratified in recent years.
Many RISC-V companies are building server chips, with the most notable being Ventana and Esperanto.?
The companies have built their own proprietary modules on top of the base instruction set architecture but have said they would standardize to the latest specs ratified by RISC-V International.
Research organizations in the Europe and U.S. are experimenting with RISC-V microservers to develop and test software.?
The proposal to create a server spec also reflects the open-source ethos of RISC-V — to jointly develop and improve a product as a community.
“The reason we’re a community at all…is we get to share the burden,” said Mark Himelstein, the chief technology officer at RISC-V International, during a recent presentation at a RISC-V Summit held last month in Barcelona.
The goal is to prevent hardware and software fragmentation in the RISC-V community. RISC-V International wants to avoid the fate of Android, which quickly fragmented as phone developers modified the OS to meet their smartphone needs.
“We share the work of defining the ISA, we share the work of finding the hardware-software interface… and we share the software burden. It means everything from boot code all the way up to applications,” Himelstein said.
RISC-V still is not considered a viable server alternative to x86 or ARM, which dominate the data center market.
“When people say ‘Oh, RISC five is 10 years behind ARM,’ the answer is yes, but it is not going to take 10 years to catch up. It will take a couple of years to catch up,” said Dave Ditzel, CEO of Esperanto Systems, during another presentation at the RISC-V Summit.
About HS-2
HS-2 RISC-V通用主板是澎峰科技與合作伙伴共同研發的一款專為開發者設計的標準mATX主板,它預裝了澎峰科技為RISC-V高性能服務器定制開發的軟件包,包括各種標準bencmark、支持V擴展
的GCC編譯器、計算庫、中間件以及多種典型服務器應用程序。
HS-2 RISC-V通用主板搭載了一顆國產RISC-V 64核處理器(SG2042)。SG2042是目前已量產的性能最高的RISC-V處理器,主要針對高性能計算領域需求設計,適用于科學計算、工程計算、AI計算、融合計算等大算力應用場景。
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